In recent years, the pitch for bump bonding substrates and drivers is becoming finer and finer along with the high integration of LCD driver. In the flip-chip bonding, a method by which the pattern surface of a die is directly mounted to a substrate via a bump, the possibility of bonding defects becomes high if there is a bump height variation. Also for TSV (Through Silicon Via) that is expected to be used for technologies such as SiP, the reduction in height variation of electroplated surfaces on the circuit is a challenge to be addressed.
When connecting a bump, ACF (Anisotropic Conductive Film) containing conductive particles are usually used between the bump and substrate. If the bump surface roughness is great, however, the conductive particles in the ACF would go into the depressions and bonding defects may occur. To avoid this problem, bump surface roughness needs to be reduced.
The new DAS8930 is equipment that has been developed based on the DFS8910 fully automatic surface planer but without the transfer unit for a space-saving design while maintaining the same processing quality. This model is also ideal for R&D applications as it allows easy switching of workpieces.
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