Introducing the DFG8340, a grinder for processing φ8" wafers to an extremely precise degree of flatness
DISCO Corporation (Head Office: Ota-ku, Tokyo; President: Kazuma Sekiya) has developed the DFG8340 for the silicon wafer manufacturing process. This fully automatic grinder reduces variation of wafer thickness and improves wafer flatness.
Development Background
 The silicon wafer manufacturing process includes a grinding step after slicing wafers from ingots in order to reduce thickness variation among wafers and make wafers flat. Conventionally the fully automatic grinder DFG830 has gained customer trust in the manufacturing of φ8" silicon wafers, but the requests for a successor, which can enhance usability and reduce footprint, have been increasing. Furthermore, grinding to flatten small-diameter workpieces, such as substrates for LED and electronics parts, has also been requested.
In order to meet these requests, DISCO has developed the DFG8340. |
Features of the DFG8340
<Extremely precise degree of flatness>
Thanks to its original new spindle and new material at the processing point, which prevents deformation by processing heat, the DFG834 grinds wafers to a remarkably high flatness. A tilt of the chuck table, which holds a wafer, is controlled electrically to improve maintainability and stably achieve the high flatness. This enables a stable process in which the variation of φ8" wafer thickness is below 1.5 µm and variation among wafers ±1.5 µm.
| Wafer manufacturing process |
<Specification suitable for the wafer manufacturing process>
In the planarization process, it is required to improve wafer shape aggravated by lapping or etching as well as to minimize the grinding amount in order to increase the number of wafers sliced from ingots.
The DFG8340, in combination with the fine mesh wheel optimized for grinding in the wafer manufacturing process, makes it possible to conduct the planarization grinding using only one axis directly on the lapped or etched surface with less grinding amount.
 <Small space>
The footprint is reduced from the existing DFG830 by 24% so as to be able to use the clean room space effectively. |
Target Processes
|
-
|
High degree of planarization in the silicon wafer manufacturing process
|
|
-
|
Removal of surface circuits in the wafer reclaiming process
|
|
-
|
Planarization of small-diameter workpieces other than silicon and full automation of the process which used to be conducted manually
|
Schedule
|
Unveiling at SEMICON Japan 2009
|
:
|
December 2009
|
|
Production start
|
:
|
May 2010 (scheduled)
|
|
|
|
